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| 1. general description the tda8034t/TDA8034AT is a cost-effective analog interface for asynchronous and synchronous smart cards operating at 5 v or 3 v. using few external components, the tda8034t/TDA8034AT provides all supply, protection and control functions between a smart card and the microcontroller. 2. features n integrated circuit smart card interface in an so16 package n 5 v or 3 v smart card supply n one protected half-duplex bidirectional buffered i/o line (c7) n v cc regulation: u 5v 5 % or 3 v 5 % using two low esr multilayer ceramic capacitors: one of 220 nf and one of 470 nf u current spikes of 40 na/s (v cc = 5 v and 3 v) or 15 na/s (v cc =1.8 v) up to 20 mhz, with controlled rise and fall times and ?ltered overload detection of approximately 120 ma n thermal and short-circuit protection for all card contacts n automatic activation and deactivation sequences triggered by a short-circuit, card take-off, overheating, falling v dd , v dd(intf) or v ddp n enhanced card-side electrostatic discharge (esd) protection of > 6 kv n external clock input up to 26 mhz connected to pin xtal1 n card clock generation up to 20 mhz using pin clkdiv1 with synchronous frequency changes of: u 1 2 f xtal or 1 4 f xtal on tda8034t u f xtal or 1 2 f xtal on TDA8034AT n non-inverted control of pin rst using pin rstin n compatible with iso 7816, nds and emv 4.2 payment systems n supply supervisor for killing spikes during power on and off: u using a ?xed threshold u using an external resistor bridge with threshold adjustment n built-in debouncing on card presence contacts (typically 4.5 ms) n multiplexed status signal using pin offn 3. applications n pay tv n electronic payment tda8034t; TDA8034AT smart card interface rev. 01 5 february 2010 product data sheet
tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 2 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface n identi?cation n bank card readers 4. quick reference data [1] to meet these speci?cations, v cc should be decoupled to pin gnd using two ceramic multilayer capacitors of low esr with values of either 100 nf or one 220 nf and one 470 nf. 5. ordering information table 1. quick reference data v ddp =5v; v dd = 3.3 v; v dd(intf) = 3.3 v; f xtal = 10 mhz; gnd = 0 v; t amb = 25 ?c; unless otherwise speci?ed. symbol parameter conditions min typ max unit supply v ddp power supply voltage pin v ddp 4.85 5 5.5 v v dd supply voltage pin v dd 2.7 3.3 3.6 v v dd(intf) interface supply voltage pin v dd(intf) 1.6 3.3 v dd + 0.3 v i dd supply current shutdown mode - - 35 m a i ddp power supply current shutdown mode; f xtal stopped --5 m a active mode; f clk = 1 2 f xtal ; no load - - 1.5 ma i dd(intf) interface supply current shutdown mode - - 6 m a card supply voltage: pin v cc [1] v cc supply voltage active mode 5 v card i cc < 65 ma dc 4.75 5.0 5.25 v current pulses of 40 na/s at i cc < 200 ma; t < 400 ns 4.65 5.0 5.25 v v ripple(p-p) peak-to-peak ripple voltage from 20 khz to 200 mhz - - 350 mv i cc supply current v cc = 0 v to 5 v or 3 v - - 65 ma general t deact deactivation time see figure 7 on page 10 35 90 250 m s p tot total power dissipation t amb = - 25 c to +85 c - - 0.25 w t amb ambient temperature - 25 - +85 c table 2. ordering information type number package name description version tda8034t so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 TDA8034AT tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 3 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 6. block diagram fig 1. block diagram 001aak989 470 nf 220 nf 100 nf 100 nf 100 nf 10 m f supply internal reference voltage sense internal oscillator crystal oscillator alarmn presn v dd rstin cmdvccn offn clkdiv1 6 i/ouc 7 4 5 15 16 v dd(intf) clkup en1 v ddp gnd 913 14 12 3 pvcc en4 v cc rst clk i/o 12 11 10 8 en3 en2 clk sequencer v cc ldo xtal1 xtal2 reset generator clock generator cmdvccn detection i/o transceiver level shifter clock circuitry thermal protection tda8034t TDA8034AT c5 c1 c6 c2 c7 c3 c8 c4 card connector tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 4 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 7. pinning information 7.1 pinning 7.2 pin description [1] i = input, o = output, i/o = input/output, g = ground and p = power supply. [2] if pin presn is high, the card is considered to be present. during card insertion, debouncing can occur on these signals. to counter this, the tda8034t/TDA8034AT has a built-in debouncing timer (typically 4.5 ms). [3] uses an internal 11 k w pull-up resistor connected to pin v cc . [4] using a 220 nf capacitor increases the noise margin on pin v cc . fig 2. pin con?guration (so16) tda8034t TDA8034AT xtal1 i/ouc xtal2 offn v dd(intf) v dd rstin v ddp cmdvccn v cc clkdiv1 rst presn clk i/o gnd 001aak990 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 3. pin description symbol pin supply type [1] description xtal1 1 v dd i crystal connection input xtal2 2 v dd o crystal connection output v dd(intf) 3v dd(intf) p interface supply voltage rstin 4 v dd(intf) i microcontroller card reset input; active high cmdvccn 5 v dd(intf) i microcontroller start activation sequence input; active low clkdiv1 6 v dd(intf) i sets the clock frequency on pin clk; see t ab le 4 on page 7 presn 7 v dd(intf) i card presence contact input; active low [2] i/o 8 v cc i/o card input/output data line (c7) [3] gnd 9 - g ground clk 10 v cc o card clock (c3) rst 11 v cc o card reset (c2) v cc 12 v cc p card supply (c1); decouple to pin gnd using one 470 nf capacitor close to pin v cc and one 220 nf capacitor close to card socket contact c1 with an esr < 100 m w [4] v ddp 13 v ddp p low-dropout regulator input supply voltage v dd 14 v dd p digital supply voltage offn 15 v dd(intf) o nmos interrupt to microcontroller [5] ; active low; see section 8.9 on page 10 i/ouc 16 v dd(intf) i/o microcontroller input/output data line [3] tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 5 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface [5] uses an internal 20 k w pull-up resistor connected to pin v dd . 8. functional description remark: throughout this document the iso 7816 terminology conventions have been adhered to and it is assumed that the reader is familiar with these. 8.1 power supplies the power supply voltage ranges are as follows: ? v ddp : 4.85 v to 5.5 v ? v dd : 2.7 v to 3.6 v all interface signals to the system controller are referenced to v dd(intf) . all card contacts remain inactive during power up or power down. after powering up the device, pin offn remains low until pin cmdvccn is set high and pin presn is low. during power down, pin offn goes low when v ddp falls below the falling threshold voltage (v th ). the internal oscillator frequency (f osc(int) ) is only used during the activation sequences. when the card is not activated (pin cmdvccn is high), the internal oscillator is in low frequency mode to reduce power consumption. this device has a low drop-off (ldo) voltage regulator connected to pin v cc , and is used instead of a dc-to-dc converter. it ensures a minimum v cc of 4.75 v and that the power supply voltage on pin v ddp does not fall below 4.85 v for a maximum load current of 65 ma. 8.2 voltage supervisor fig 3. voltage supervisor circuit 001aak991 reference voltage v dd v dd v dd(intf) 5 v or 3 v v ddp tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 6 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface the voltage supervisor monitors the voltage of the v ddp and v dd supplies providing both power-on reset (por) and supply drop-out detection during a card session. the supervisor threshold voltages for v ddp and v dd are set internally. as long as v dd is less than v th +v hys , the ic remains inactive irrespective of the command line levels. after v dd has reached a level higher than v th + v hys , the ic remains inactive for the duration of t w . the output of the supervisor is sent to a digital controller in order to reset the tda8034t/TDA8034AT. this de?ned reset pulse of approximately 8 ms, i.e. (t w = 1024 1 fosc(int)low ), is used internally to maintain the ic in the shutdown mode during the supply voltage power on; see figure 4 . a deactivation sequence is performed when either v dd or v ddp falls below v th . remark: f osc(int)low is the low frequency (or inactive) mode of the de?ned f osc(int) parameter. 8.3 clock circuits the clock signal from pin clk to the card is either supplied by an external clock signal connected to pin xtal1 or generated using a crystal connected between pins xtal1 and xtal2. the tda8034t/TDA8034AT automatically detects if an external clock is connected to xtal1, eliminating the need for a separate pin to select the clock source. automatic clock source detection is performed on each activation command (falling edge of the signal on pin cmdvccn). the presence of an external clock on pin xtal1 is checked during a time window de?ned by the internal oscillator. if a clock is detected, the internal crystal oscillator is stopped. if a clock is not detected, the internal crystal oscillator is started. when an external clock is used, it is mandatory that the clock is applied to pin xtal1 before the falling edge of the signal on pin cmdvccn. fig 4. voltage supervisor waveforms 001aak993 t w t w power on supply dropout power off v th + v hys v th v dd alarmn (internal signal) tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 7 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface the clock frequency is selected using pin clkdiv1 to be either 1 2 f xtal or 1 4 f xtal on tda8034t or f xtal or 1 2 f xtal on TDA8034AT as shown in t ab le 4 . the frequency change is synchronous and as such during transition, no pulse is shorter than 45 % of the smallest period. in addition, only the ?rst and last clock pulse around the change has the correct width. when dynamically changing the frequency, the modi?cation is only effective after 10 clock periods on pin xtal1. the duty cycle of f xtal on pin clk should be between 45 % and 55 %. if an external clock is connected to pin xtal1, its duty cycle must be between 48 % and 52 %. when the frequency of the clock signal on pin clk is either 1 2 f xtal or 1 4 f xtal on tda8034t or f xtal or 1 2 f xtal on TDA8034AT, the frequency dividers guarantee a duty cycle between 45 % and 55 %. 8.4 input and output circuits when pins i/o and i/ouc are pulled high using an 11 k w resistor between pins i/o and v cc and/or between pins i/ouc and v dd(intf) , both lines enter the idle state. pin i/o is referenced to v cc and pin i/ouc to v dd(intf) , thus allowing operation at v cc 1 v dd(intf) . the ?rst side on which a falling edge occurs becomes the master. an anti-latch circuit disables falling edge detection on the other line, making it the slave. after a time delay t d , the logic 0 present on the master-side is sent to the slave-side. when the master-side returns logic 1, the slave-side sends logic 1 during time delay (t w(pu) ). after this sequence, both master and slave sides return to their idle states. the active pull-up feature ensures fast low-to-high transitions making the tda8034t/TDA8034AT capable of delivering more than 1 ma, up to an output voltage of 0.9v cc , at a load of 80 pf. at the end of the active pull-up pulse, the output voltage is dependent on the internal pull-up resistor value and load current. the current sent to and received from the cards i/o lines is limited to 15 ma at a maximum frequency of 1 mhz. enclkin and clkxtal are internal signal names. fig 5. basic layout for using an external clock table 4. clock con?guration pin clkdiv1 level pin clk level tda8034t TDA8034AT high 1 2 f xtal 1 2 f xtal low 1 4 f xtal f xtal 001aak992 digital multiplexer crystal xtal1 xtal2 clkxtal enclkin tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 8 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 8.5 shutdown mode after a power-on reset, if pin cmdvccn is high, the circuit enters the shutdown mode, ensuring only the minimum number of circuits are active while the tda8034t/TDA8034AT waits for the microcontroller to start a session. ? all card contacts are inactive. the impedance between the contacts and gnd is approximately 200 w . ? pin i/ouc is high-impedance using the 11 k w pull-up resistor connected to v dd(intf) ? the voltage generators are stopped ? the voltage supervisor is active ? the internal oscillator runs at its lowest frequency (f osc(int)low ) 8.6 activation sequence the following device activation sequence is applied when using an external clock; see figure 6 : 1. pin cmdvccn is pulled low (t0). 2. the internal oscillator is triggered (t0). 3. the internal oscillator changes to high frequency (t1). 4. v cc rises from either 0 v to 3 v or 0 v to 5 v on a controlled slope (t2). 5. pin i/o is driven high (t3). 6. the clock on pin clk is applied to the c3 contact (t4). 7. pin rst is enabled (t5). calculation of the time delays is as follows: ? t1 = t0 + 384 1 fosc(int)low ? t2 = t1 ? t3 = t1 + 17t / 2 ? t4 = driven by host controller; > t3 and < t5 ? t5 = t1 + 23t / 2 remark: the value of period t is 64 times the period interval of the internal oscillator at high frequency ( 1 fosc(int)high ); t3 is called t d(start) and t5 is called t d(end) . tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 9 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 8.7 deactivation sequence when a session ends, the microcontroller sets pin cmdvccn high. the tda8034t/TDA8034AT then executes an automatic deactivation sequence by counting the sequencer back to the inactive state (see figure 7 ) as follows: 1. pin rst is pulled low (t11). 2. the clock is stopped, pin clk is low (t12). 3. pin i/o is pulled low (t13). 4. v cc falls to 0 v (t14). the deactivation sequence is completed when v cc reaches its inactive state. 5. v cc < 0.4 v (t deac ) 6. all card contacts become low-impedance to gnd. however, pin i/ouc remains pulled up to v dd using the 11 k w resistor. 7. the internal oscillator returns to its low frequency mode. calculation of the time delays is as follows: ? t11 = t10 + 3t / 64 ? t12 = t1 1+t/2 ? t13 = t11 + t ? t14 = t11 + 3t / 2 ? t deac = t11 + 3t / 2 + v cc fall time oscint = internal oscillator. fig 6. activation sequence at t3 001aai966 cmdvccn xtal v cc i/o at r clk > 200 ns rstin rst i/ouc oscint t0 t d(end) = t act t1 = t2 t d(start) t4 low frequency high frequency tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 10 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface remark: the value of period t is 64 times the period interval of the internal oscillator (i.e. 25 m s). 8.8 v cc regulator the v cc buffer is able to continuously deliver up to 65 ma at v cc = 5 v or 3 v. the v cc buffer has an internal overload protection with a threshold value of approximately 120 ma. this detection is internally ?ltered, enabling spurious current pulses up to 200 ma with a duration of a few milliseconds to be drawn by the card without causing deactivation. however, the average current value must stay below maximum; see t ab le 8 . 8.9 fault detection the following conditions are monitored by the fault detection circuit: ? short-circuit or high current on pin v cc ? card removal during transaction ? v ddp falling ? v dd falling ? v dd(intf) falling ? overheating fault detection monitors two different situations: ? outside card sessions, pin cmdvccn is high: pin offn is low if the card is not in the reader and high if the card is in the reader. any voltage drop on v dd is detected by the voltage supervisor. this generates an internal power-on reset pulse but does not act upon the pin offn signal. the card is not powered-up and short-circuits or overheating are not detected. oscint = internal oscillator. fig 7. deactivation sequence 001aak995 rst clk i/o v cc xtal1 oscint cmdvcc high frequency t10 t11 t12 t13 t deact t14 low frequency tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 11 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface ? in card sessions, pin cmdvccn is low: when pin offn goes low, the fault detection circuit triggers the automatic emergency deactivation sequence (see figure 8 ). when the microcontroller resets pin cmdvccn to high, after the deactivation sequence, pin offn is rechecked. if the card is still present, pin offn returns to high. this check identi?es the fault as either a hardware problem or a card removal incident. on card insertion or removal, bouncing can occur in the presn signal. this depends on the type of card presence switch in the connector (normally open or normally closed) and the mechanical characteristics of the switch. to correct for this, a debouncing feature is integrated in to the tda8034t/TDA8034AT. this feature operates at a typical duration of 4.5 ms (t deb = 640 ( 1 fosc(int)low ). figure 9 on page 12 shows the operation of the debouncing feature. on card insertion, pin offn goes high after the debounce time has elapsed. when the card is extracted, the automatic card deactivation sequence is performed on the ?rst high/low transition on pin presn. after this, pin offn goes low. fig 8. emergency deactivation sequence after card removal 001aai971 offn presn clk i/o v cc xtal oscint t10 t12 t deact t13 t14 rst low frequency high frequency tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 12 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 8.10 automatic determining of card supply voltage the supply voltage (v cc ) that the card requires is determined automatically by monitoring the duration of the high state (logic 1) on pin cmdvccn before the activation command (cmdvccn falling edge) occurs. if pin cmdvccn stays high for more than 30 ms, activation occurs with v cc set to 5 v. if pin cmdvccn stays high for less than 15 ms, activation occurs with v cc set to 3 v. to activate the card at v cc = 5 v, pin cmdvccn must stay high for t0 > 30 ms before going low (logic 0). to activate the card at v cc = 3 v, pin cmdvccn must stay high for t0 < 15 ms before going low (logic 0). if pin cmdvccn is high for more than 15 ms (t0 > 15 ms) but less than 30 ms, pin cmdvccn must be set low for t1 (200 m s tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 13 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface if pin cmdvccn is high for more than 30 ms (card inactive), and if the card needs to be activated at 3 v, the sequence shown in figure 12 applies: pin cmdvccn must be set low for t1 (200 m s < t1 < 700 m s), and then high for t2 (200 m s < t2 < 15 ms) before going low. 9. limiting values remark: all card contacts are protected against any short-circuit to any other card contact. stress beyond the levels indicated in t ab le 5 can cause permanent damage to the device. this is a short-term stress rating only and under no circumstances implies functional operation under long-term stress conditions. 10. thermal characteristics fig 12. card activation, v cc = 3 v, t0 > 15 ms 001aal000 cmdvccn 3 v or 5 v 3 v t0 v cc t1 t2 table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v ddp power supply voltage pin v ddp - 0.3 +6 v v dd supply voltage pin v dd - 0.3 +4.6 v v dd(intf) interface supply voltage pin v dd(intf) - 0.3 +4.6 v v i input voltage pins cmdvccn, clkdiv1, rstin, offn, xtal1, xtal2, i/ouc - 0.3 +4.6 v card contact pins presn, i/o, rst and clk - 0.3 +6 v t stg storage temperature - 55 +150 c p tot total power dissipation t amb = - 25 c to +85 c - 0.25 w t j junction temperature - +125 c t amb ambient temperature - 25 +85 c v esd electrostatic discharge voltage human body model (hbm) on card pins i/o, rst, v cc , clk, presn; within typical application - 6+6kv human body model (hbm); all other pins - 2+2kv machine model (mm); all pins - 200 +200 v field charged device model (fcdm); all pins - 500 +500 v table 6. thermal characteristics symbol package name parameter conditions typ unit r th(j-a) so16 thermal resistance from junction to ambient in free air 94 k/w tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 14 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 11. characteristics table 7. characteristics of ic supply voltage v ddp = 5 v; v dd = 3.3 v; v dd(intf) = 3.3 v; f xtal = 10 mhz; gnd = 0 v; t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit supply v ddp power supply voltage pin v ddp 4.85 5 5.5 v v dd supply voltage pin v dd 2.7 3.3 3.6 v v dd(intf) interface supply voltage pin v dd(intf) 1.6 3.3 v dd + 0.3 v i dd supply current shutdown mode - - 35 m a i ddp power supply current shutdown mode f xtal stopped - - 5 m a active mode f clk = 1 2 f xtal ; no load - - 1.5 ma f clk = 1 2 f xtal ;i cc =65ma - - 70 ma i dd(intf) interface supply current shutdown mode - - 6 m a v th threshold voltage pin v dd 2.30 2.40 2.50 v pin v ddp 3.00 4.10 4.40 v v hys hysteresis voltage pin v dd 50 100 150 mv pin v ddp 100 200 350 mv t w pulse width 5.1 8 10.2 ms card supply voltage: pin v cc [1] c dec decoupling capacitance connected to v cc [2] 550 - 830 nf v o output voltage shutdown mode no load - 0.1 - +0.1 v i o =1ma - 0.1 - +0.3 v i o output current shutdown mode; pin v cc connected to ground -- - 1ma v cc supply voltage active mode 5 v card i cc < 65 ma dc 4.75 5.0 5.25 v current pulses of 40 na/s at i cc < 200 ma; t < 400 ns 4.65 5.0 5.25 v 3 v card i cc < 65 ma dc 2.85 3.05 3.15 v current pulses of 40 na/s at i cc < 200 ma; t < 400 ns 2.76 - 3.20 v v ripple(p-p) peak-to-peak ripple voltage 20 khz to 200 mhz - - 350 mv i cc supply current v cc = 0 v to 5 v or 3 v - - 65 ma v cc shorted to ground 90 120 150 ma sr slew rate 5 v card 0.055 0.180 0.300 v/ m s 3 v card 0.040 0.180 0.300 v/ m s tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 15 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface crystal oscillator: pins xtal1 and xtal2 c ext external capacitance pins xtal1 and xtal2 (depending on the crystal or resonator speci?cation) - - 15 pf f xtal crystal frequency card clock reference; crystal oscillator 2 - 26 mhz f ext external frequency external clock on pin xtal1 0 - 26 mhz v il low-level input voltage crystal oscillator - 0.3 - +0.3v dd v external clock - 0.3 - +0.3v dd(intf) v v ih high-level input voltage crystal oscillator 0.7v dd -v dd + 0.3 v external clock 0.7v dd(intf) -v dd(intf) + 0.3 v data lines: pins i/o and i/ouc t d delay time falling edge on pins i/o and i/ouc or vise versa - - 200 ns t w(pu) pull-up pulse width 200 - 400 ns f io input/output frequency on data lines - - 1 mhz c i input capacitance on data lines - - 10 pf data lines to the card: pin i/o [3] v o output voltage shutdown mode no load 0 - 0.1 v i o = 1 ma 0 - 0.3 v i o output current shutdown mode; pin i/o grounded -- - 1ma v ol low-level output voltage i ol = 1 ma 0 - 0.3 v i ol 3 15 ma v cc - 0.4 - v cc v v oh high-level output voltage no dc load 0.9v cc -v cc + 0.1 v i oh < - 40 m a 0.75v cc -v cc + 0.1 v i oh 3- 15 ma 0 - 0.4 v v il low-level input voltage - 0.3 - +0.8 v v ih high-level input voltage v cc = +5 v 0.6v cc -v cc + 0.3 v v cc = +3 v 0.7v cc -v cc + 0.3 v v hys hysteresis voltage pin i/o - 50 - mv i il low-level input current pin i/o; v il = 0 v - - 600 m a i ih high-level input current pin i/o; v ih =v cc -- 10 m a t r(i) input rise time v il maximum to v ih minimum - - 1.2 m s t r(o) output rise time c l 80 pf; 10 % to 90 %; 0 v to v cc - - 0.1 m s t f(i) input fall time v il maximum to v ih minimum - - 1.2 m s t f(o) output fall time c l 80 pf; 10 % to 90 %; 0 v to v cc - - 0.1 m s table 7. characteristics of ic supply voltage continued v ddp = 5 v; v dd = 3.3 v; v dd(intf) = 3.3 v; f xtal = 10 mhz; gnd = 0 v; t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 16 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface r pu pull-up resistance connected to v cc 7 9 11 k w i pu pull-up current v oh = 0.9v cc ; c=80pf - 8 - 6 - 4ma data lines to the system: pin i/ouc [4] v ol low-level output voltage i ol = 1 ma 0 - 0.3 v v oh high-level output voltage no dc load 0.9v dd(intf) -v dd(intf) + 0.1 v i oh 40 m a; v dd(intf) > 2 v 0.75v dd(intf) -v dd(intf) + 0.1 v i oh 20 m a; v dd(intf) < 2 v 0.75v dd(intf) -v dd(intf) + 0.1 v v il low-level input voltage - 0.3 - +0.3v dd(intf) v v ih high-level input voltage 0.7v dd(intf) -v dd(intf) + 0.3 v v hys hysteresis voltage pin i/ouc - 0.14v dd(intf) -v i ih high-level input current v ih =v dd(intf) -- 10 m a i il low-level input current v il = 0 v - - 600 m a r pu pull-up resistance connected to v dd(intf) 81012 k w t r(i) input rise time v il maximum to v ih minimum - - 1.2 m s t r(o) output rise time c l 30 pf; 10 % to 90 %; 0 v to v dd(intf) - - 0.1 m s t f(i) input fall time v il maximum to v ih minimum - - 1.2 m s t f(o) output fall time c l 30 pf; 10 % to 90 %; 0 v to v dd(intf) - - 0.1 m s i pu pull-up current v oh = 0.9v dd ; c = 30 pf - 1- - ma internal oscillator f osc(int) internal oscillator frequency shutdown mode 100 150 200 khz active state 2 2.7 3.2 mhz reset output to the card: pin rst v o output voltage shutdown mode no load 0 - 0.1 v i o = 1 ma 0 - 0.3 v i o output current shutdown mode; pin rst grounded -- - 1ma t d delay time between pins rstin and rst; rst enabled -- 2 m s v ol low-level output voltage i ol = 200 m a; v cc = +5 v 0 - 0.3 v i ol = 200 m a; v cc = +3 v 0 - 0.2 v current limit i ol = 20 ma v cc - 0.4 - v cc v v oh high-level output voltage i oh = - 200 m a 0.9v cc -v cc v current limit i oh = - 20 ma 0 - 0.4 v t r rise time c l = 100 pf - - 0.1 m s table 7. characteristics of ic supply voltage continued v ddp = 5 v; v dd = 3.3 v; v dd(intf) = 3.3 v; f xtal = 10 mhz; gnd = 0 v; t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 17 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface t f fall time c l = 100 pf - - 0.1 m s clock output to the card: pin clk v o output voltage shutdown mode no load 0 - 0.1 v i o = 1 ma 0 - 0.3 v i o output current shutdown mode; pin clk grounded -- - 1ma v ol low-level output voltage i ol = 200 m a 0 - 0.3 v current limit i ol =70ma v cc - 0.4 - v cc v v oh high-level output voltage i oh = - 200 m a 0.9v cc -v cc v current limit i oh = - 70 ma 0 - 0.4 v t r rise time c l =30pf [5] - - 16 ns t f fall time c l =30pf [5] - - 16 ns f clk frequency on pin clk operational 0 - 20 mhz d duty cycle c l =30pf [5] 45 - 55 % sr slew rate rise and fall; c l =30pf v cc = +5 v 0.2 - - v/ns v cc = +3 v 0.12 - - v/ns control inputs: pins clkdiv1 and rstin [6] v il low-level input voltage - 0.3 - 0.3v dd(intf) v v ih high-level input voltage 0.7 v dd(intf) -v dd(intf) + 0.3 v v hys hysteresis voltage control input - 0.14 v dd(intf) -v i il low-level input current v il =0v - - 1 m a i ih high-level input current v ih =v dd(intf) -- 1 m a control input: pin cmdvccn [6] v il low-level input voltage - 0.3 - 0.3v dd(intf) v v ih high-level input voltage 0.7v dd(intf) -v dd(intf) + 0.3 v v hys hysteresis voltage control input - 0.14v dd(intf) -v i il low-level input current v il =0v - - 1 m a i ih high-level input current v ih =v dd(intf) -- 1 m a f cmdvccn frequency on pin cmdvccn - - 100 hz t w pulse width 5 v card; figure 10 30 - - ms 3 v card; figure 11 , figure 12 - - 15 ms card detection input [6] [7] v il low-level input voltage - 0.3 - 0.3v dd(intf) v table 7. characteristics of ic supply voltage continued v ddp = 5 v; v dd = 3.3 v; v dd(intf) = 3.3 v; f xtal = 10 mhz; gnd = 0 v; t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 18 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface [1] to meet these speci?cations, v cc should be decoupled to pin gnd using two ceramic multilayer capacitors of low esr with values of either 100 nf or one 220 nf and one 470 nf. [2] using decoupling capacitors of one 220 nf 20 % and one 470 nf 20 %. [3] using the integrated 9 k w pull-up resistor connected to v cc . [4] using the integrated 10 k w pull-up resistor connected to v dd(intf) . [5] the transition time and the duty factor de?nitions are shown in figure 13 on page 19 ; d = t1 / (t1 + t2). [6] pins presn and cmdvccn are active low; pin rstin is active high; see t ab le 4 for states of pin clkdiv1. [7] pin presn has an integrated current source of 1.25 m a to v dd(intf) . [8] pin offn is an nmos drain, using an internal 20 k w pull-up resistor connected to v dd(intf) . v ih high-level input voltage 0.7v dd(intf) -v dd(intf) + 0.3 v v hys hysteresis voltage pin presn - 0.14v dd(intf) -v i il low-level input current 0 v < v il tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 20 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 13. package outline fig 15. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1 tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 21 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 14. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 surface mount re?ow soldering description . 14.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electrical circuits. the soldered joint provides both the mechanical and the electrical connection. there is no single soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for ?ne pitch smds. re?ow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 14.2 wave and re?ow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. the re?ow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature pro?le. leaded packages, packages with solder balls, and leadless packages are all re?ow solderable. key characteristics in both wave and re?ow soldering are: ? board speci?cations, including the board ?nish, solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivity level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 14.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhesive and ?ux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath speci?cations, including temperature and impurities tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 22 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 14.4 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 16 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 10 and 11 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 16 . table 10. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 11. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 23 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 15. abbreviations msl: moisture sensitivity level fig 16. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 12. abbreviations acronym description emv europay mastercard visa esd electrostatic discharge esr equivalent series resistor fcdm field charged device model hbm human body model ldo low drop-out mm machine model nmos negative-channel metal-oxide semiconductor por power-on reset tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 24 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 16. revision history table 13. revision history document id release date data sheet status change notice supersedes tda8034t_TDA8034AT_1 20100205 product data sheet - - tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 25 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 17.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. product speci?cation the information and data provided in a product data sheet shall de?ne the speci?cation of the product as agreed between nxp semiconductors and its customer, unless nxp semiconductors and customer have explicitly agreed otherwise in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.3 disclaimers limited warranty and liability information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost pro?ts, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customers third party customer(s) (hereinafter both referred to as application). it is customers sole responsibility to check whether the nxp semiconductors product is suitable and ?t for the application planned. customer has to do all necessary testing for the application in order to avoid a default of the application and the product. nxp semiconductors does not accept any liability in this respect. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customers general terms and conditions with regard to the purchase of nxp semiconductors products by customer. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. quick reference data the quick reference data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not complete, exhaustive or legally binding. non-automotive quali?ed products unless the data sheet of an nxp semiconductors product expressly states that the product is automotive quali?ed, the product is not suitable for automotive use. it is neither quali?ed nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liability for inclusion and/or use of non-automotive quali?ed products in automotive equipment or applications. document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation. tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 26 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface in the event that customer uses the product for design-in and use in automotive applications to automotive speci?cations and standards, customer (a) shall use the product without nxp semiconductors warranty of the product for such automotive applications, use and speci?cations, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors speci?cations such use shall be solely at customers own risk, and (c) customer fully indemni?es nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond nxp semiconductors standard warranty and nxp semiconductors product speci?cations. 17.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 18. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 27 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 19. tables table 1. quick reference data . . . . . . . . . . . . . . . . . . . . .2 table 2. ordering information . . . . . . . . . . . . . . . . . . . . .2 table 3. pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4 table 4. clock con?guration . . . . . . . . . . . . . . . . . . . . . .7 table 5. limiting values . . . . . . . . . . . . . . . . . . . . . . . . .13 table 6. thermal characteristics . . . . . . . . . . . . . . . . . .13 table 7. characteristics of ic supply voltage . . . . . . . .14 table 8. protection characteristics . . . . . . . . . . . . . . . . .18 table 9. timing characteristics . . . . . . . . . . . . . . . . . . .18 table 10. snpb eutectic process (from j-std-020c) . . .22 table 11. lead-free process (from j-std-020c) . . . . . .22 table 12. abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .23 table 13. revision history . . . . . . . . . . . . . . . . . . . . . . . .24 tda8034t_TDA8034AT_1 ? nxp b.v. 2010. all rights reserved. product data sheet rev. 01 5 february 2010 28 of 29 nxp semiconductors tda8034t; TDA8034AT smart card interface 20. figures fig 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 fig 2. pin con?guration (so16) . . . . . . . . . . . . . . . . . . . .4 fig 3. voltage supervisor circuit . . . . . . . . . . . . . . . . . . . .5 fig 4. voltage supervisor waveforms . . . . . . . . . . . . . . . .6 fig 5. basic layout for using an external clock . . . . . . . . .7 fig 6. activation sequence at t3. . . . . . . . . . . . . . . . . . . .9 fig 7. deactivation sequence. . . . . . . . . . . . . . . . . . . . .10 fig 8. emergency deactivation sequence after card removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 fig 9. operation of debounce feature with pins offn, cmdvccn, presn and v cc . . . . . . . . . . . . . . .12 fig 10. card activation, v cc = 5 v, t0 > 30 ms. . . . . . . . .12 fig 11. card activation, v cc = 3 v, t0 < 15 ms. . . . . . . . .12 fig 12. card activation, v cc = 3 v, t0 > 15 ms. . . . . . . . .13 fig 13. de?nition of output and input transition times . . .19 fig 14. application diagram . . . . . . . . . . . . . . . . . . . . . . .19 fig 15. package outline sot109-1 (so16) . . . . . . . . . . .20 fig 16. temperature pro?les for large and small components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 nxp semiconductors tda8034t; TDA8034AT smart card interface ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 5 february 2010 document identifier: tda8034t_TDA8034AT_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 functional description . . . . . . . . . . . . . . . . . . . 5 8.1 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 voltage supervisor . . . . . . . . . . . . . . . . . . . . . . 5 8.3 clock circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8.4 input and output circuits . . . . . . . . . . . . . . . . . . 7 8.5 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . 8 8.6 activation sequence . . . . . . . . . . . . . . . . . . . . . 8 8.7 deactivation sequence . . . . . . . . . . . . . . . . . . . 9 8.8 v cc regulator . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.9 fault detection . . . . . . . . . . . . . . . . . . . . . . . . 10 8.10 automatic determining of card supply voltage 12 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13 10 thermal characteristics. . . . . . . . . . . . . . . . . . 13 11 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 application information. . . . . . . . . . . . . . . . . . 19 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 20 14 soldering of smd packages . . . . . . . . . . . . . . 21 14.1 introduction to soldering . . . . . . . . . . . . . . . . . 21 14.2 wave and re?ow soldering . . . . . . . . . . . . . . . 21 14.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 21 14.4 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . 22 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 24 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 25 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 25 17.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 17.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 18 contact information. . . . . . . . . . . . . . . . . . . . . 26 19 tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 20 figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 21 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 |
Price & Availability of TDA8034AT
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